Field of the Invention
This invention relates to improvements in pipelined computer processors that execute relatively simple instructions in hardware controlled execution units and execute relatively complex instructions in a milli-mode architected state with vertical microcode (i.e. millicode) routines executing in the same hardware controlled execution units. More particularly, this invention relates to a set of specialized millicode instructions which reduce the number of millicode instructions and machine cycles required to perform certain operations; namely, range checking.